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Software Engineer, TPU Compilers

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Software Engineer, TPU Compilers in USA

  • San Francisco, CA

Responsibilities

  • Optimize model execution on TPUs across model code, kernels, and hardware.
  • Profile workloads, identify bottlenecks, and improve latency, throughput, and hardware utilization.
  • Develop and optimize kernels based on model behavior and performance requirements.
  • Explore quantization and related techniques to improve inference efficiency while preserving model quality.
  • Build benchmarks and tools to measure performance, validate correctness, and guide optimization.
  • Partner with researchers and engineers to support new model architectures and productionize performance improvements.

Requirements

  • Practical experience optimizing machine learning workloads on TPUs through training, inference, or both.
  • Understanding of modern model architectures and how their computation maps onto accelerator hardware.
  • Ability to connect kernel behavior to complete-model performance across multiple layers of the stack.
  • Strong software engineering skills and a systematic approach to profiling, debugging, and validating performance improvements.
  • Ability to own open-ended technical problems, prioritize work, make design decisions, and deliver solutions.
  • Collaborative communication skills and ability to explain technical tradeoffs.
  • Experience with quantization or attention kernels is especially useful.

Salary: $380k - $500k/yr

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