Principal Firmware Debug & Dev Engineer

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Principal Firmware Debug & Dev Engineer in USA new

Microsoft
Full time
Email

USA
10/25/2026
Report

Raleigh, NC

Responsibilities

Drive product quality from hardware bring-up through deployment in partnership with cross-organizational teams.
Lead ambiguous investigations across firmware, silicon, boards, operating systems, drivers, and fleet infrastructure, delivering root-cause analysis and corrective action.
Guide firmware architecture and implementation for error reporting, crash capture, recovery, diagnosability, and reliability.
Establish reusable methods for telemetry quality, failure classification, fleet-scale correlation, reproducibility, and regression prevention.
Develop and evaluate AI data-science-assisted debugging methods, including accuracy, false positives, engineering usefulness, and data-handling controls.
Define diagnostic readiness and knowledge-transfer expectations before deployment and broader fleet adoption.
Influence cross-team priorities and mentor engineers while remaining directly engaged in complex technical problems.

Requirements

Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field and 8+ years of technical engineering experience, or a master’s degree and 6+ years, or a doctorate and 3+ years, or equivalent experience.
Preferred experience includes 12+ years of technical engineering experience or the listed degree-and-experience alternatives of 10+ years with a bachelor’s, 7+ years with a master’s, or 5+ years with a doctorate.
Experience with system or silicon debug, firmware development in C or C++, and scripting-based validation automation.
Experience leading cross-functional silicon or system investigations and delivering firmware or debug from power-on and bring-up through deployed products.
Experience defining firmware or software diagnostics and observability and using telemetry or automated analysis to resolve complex system failures.
Experience with SoC architecture, platform initialization, memory subsystems, PCIe or other low-level interfaces, and OS or RTOS concepts including scheduling, interrupts, and concurrency.
Experience with firmware security, error reporting, crash capture, recovery, and reliability mechanisms.
Experience with silicon or platform bring-up, lab debugging, and deployment of reusable diagnostics or regression coverage.
Experience applying Python, KQL/SQL or equivalent analysis tools, statistical methods, or AI-assisted diagnostics to fleet failure analysis.
Ability to meet Microsoft Cloud Background Check and applicable security screening requirements, with recurring screening every two years.
Ability to satisfy export-control eligibility verification requirements for access to controlled information.

Benefits

Base pay is listed at USD $142,800-$274,800 per year across the U.S., with a separate range of USD $188,000-$304,200 per year for specified San Francisco Bay Area and New York City metropolitan locations.
Certain roles may be eligible for benefits and other compensation.
The position is open for a minimum of five days and accepts applications on an ongoing basis until filled.

Salary: $143k - $304k/yr

Microsoft

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